1. Field of the Invention
Apparatuses and methods consistent with the present invention relate to managing a mapping table of a non-volatile memory, and more particularly, to managing a mapping table of a non-volatile memory that can show a mapping relationship between a plurality of pages sharing a memory cell in a non-volatile memory that can express bit information of the plurality of pages by using one memory cell.
2. Description of the Related Art
In general, embedded systems, such as home appliances, communication apparatuses, and set-top boxes, use non-volatile memories as storage media that store and process data.
A flash memory, which is widely used among non-volatile memories, is a non-volatile memory device that can electrically delete or rewrite data. The flash memory has lower power consumption as compared with a storage medium based on a magnetic disk memory. Further, the flash memory has a small size, and a quick access time like a hard disk. Therefore, the flash memory is appropriate for a portable apparatus.
The basic mechanism by which data bits are stored in the non-volatile memory is a memory cell. The memory cell is composed of a single field effect transistor that includes a control gate, a floating gate, a source, and a drain. At this time, the amount of charge on the floating gate is changed to change a threshold voltage of the memory cell. In this way, the data bits are stored. Further, the memory cell is read by applying a selection voltage through a word line of the control gate.
A general memory cell provides storage capacity that two types of states are stored by using one bit. That is, the memory cell provides the storage capacity for storing a bit 1 indicating a state in which data is erased or a bit 0 indicating a state in which data is stored according to a voltage that is applied.
At this time, since a mass storage device needs to provide a bit at low cost, researches on technologies that enable storing data corresponding to a plurality of bits in one memory cell have been actively made.
A technology capable of remarkably reducing the cost per bit in a non-volatile memory, which is entitled with “A multilevel-Cell 32 Mb Flash Memory”, is disclosed in International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers, pp. 132-133, the Institute of Electrical and Electronics Engineers (IEEE), February 1995 by M. Bauer et al. This paper includes a technology that provides a storage capacity with respect to four states by using two bits per memory cell.
As such, the non-volatile memory that has a storage capacity with respect to four states by using two bits per memory cell is generally called a multi-level cell (hereinafter, simply referred to as “MLC”) non-volatile memory, which stores data bits corresponding to two pages by using one memory cell. Further, the two pages corresponding to the one memory cell are called a least significant bit (LSB) page and a most significant bit (MSB) page, respectively. The data bits corresponding to the LSB page are stored first.
The use of an MLC non-volatile memory causes a problem when power supply to the non-volatile memory is suddenly interrupted while a program is executed. Thus, an MLC non-volatile memory has been generally used for products that store data which are relatively not important. Even though various kinds of methods have been proposed to ensure stable operation of an MLC non-volatile memory, all of the methods can only be applied when a mapping relationship between the LSB page and the MSB page is already known.
Specifically, when an error occurs in one of the LSB page and the MSB page due to sudden interruption of power supply to an MLC non-volatile memory, an error that occurs on a different page but sharing a memory cell can be removed when the mapping relationship between the LSB page and the MSB page that share one memory cell is known.
A flash management system using only a sequential write operation is disclosed in Korean Patent Publication No. 2004-0034580. When a flash device of the flash management system performs a write operation, if a page is available for writing in the same block, the data is written to that page. Then, the page is preferably at a higher address than any previously written page in that block. However, a method of determining the mapping relationship between the LSB page and the MSB page in the MLC non-volatile memory is not disclosed in Korean Patent Publication No. 2004-0034580.